Fault Diagnosis and Fault Tolerance: A Systematic Approach by Tinghuai Chen

By Tinghuai Chen

With the quick progress of integration scale of VLSI chips and the current want for trustworthy desktops in area exploration, fault prognosis and fault toleran­ ce became extra very important than prior to, and accordingly display loads of curiosity­ ing subject matters which are a magnet for many researchers to make lots of contribu­ tions to this box. lately, many new and important effects were accomplished. a short test over the lawsuits of the meetings on fault­ tolerant computing and layout automation in addition to on trying out will persuade the reader of that. yet regrettably those achievements haven't been whole­ ly mirrored within the textbooks, in order that there appears a spot for the hot researcher who already has the elemental wisdom and desires to start learn during this quarter. As a treatment for this deficiency, this e-book is meant for commence­ ners, particularly graduate scholars, as a textbook in order to make them the frontier of a few branches of the fault-tolerant computing box. the 1st bankruptcy introduces the four-valued good judgment B4 and its applica­ tions. In 1966 Roth first proposed this four-valued common sense as a method to generate assessments for logical circuits, yet this paintings didn't obstacle the mathe­ matical foundation of B4 itself.

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Extra resources for Fault Diagnosis and Fault Tolerance: A Systematic Approach to Special Topics

Example text

The number of pins on an integrated circuit is 64. 2n = 264 tests ~ 16 x 1018tests. If in one second 107 tests are performed, the whole testing will last 40000 years. Most of the inputs applied ·in exhaustive testing are nonsense. thus we have to find some algorithm to generate useful tests to reduce the time to an acceptable extent. Now we attempt to use four-valued logic to solve this problem. In the first interpretation of the four-value logic. a is the normal and ~ is the faulty value: if for some input value.

The corresponding test which causes the normal output to be 1 is T = ef(gh + gh) + (ef + ef){g + h + gh + gh) + (gh + gh)(e + f + ef + ef) + (ef + ef}gh. Before simplification let us consider the law of absorption g + gh = g, which is valid for the simplification of boolean functions. For example in Fig. 7, g is represented by a square and gh is represented by a circle which lies in the square. Of course the sum of them is the square itself. But here the tests 1 ~ 0 1 II Fig. 7 Simplification g and gh correspond to two classes of faults which could be detected by the tests.

Xn normal or s-a-l can be detected by T i . Similar- ly Ti = x i ···x i _ 1x i x i +1 ···xn. i = 1. 2 . •••. n can detect multiple faults containing (xi~l). T i . Tn} is the complete test set for the AND gate. Since the tests have been merged already. this set is non-redundant and also the least complete test set. This example gives us a hint that if in the STAR expansion the rear value ~I occurs. originally we should consider Xi + Xi as test; in order to the number That is. if then the test reduce of tests we consider only Xi' if the corresponding test is not O.

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